1. Field of the Invention
The present invention relates to a semiconductor device, and particularly relates to a semiconductor device, which contains a capacitor and a resistor having metal-insulator-metal (MIM) structure.
2. Description of the Related Art
Resistors are frequently employed as passive elements in semiconductor integrated circuits. In particular, besides the diffused resistor formed in the semiconductor substrate, a polysilicon film and a metal film are deposited on an insulating film that covers the semiconductor substrate and patterned to form a structure, which can be employed as a resistor. In the case of the polysilicon resistor, the resistor is often formed simultaneously with forming the gate electrode of the transistor or the electrode of the capacitive element. In the case of the metal resistor, a film of a metal, which exhibits higher resistivity and is different from the material for the interconnects is deposited to form a resistor in order to increase the resistance, or, the resistor is formed simultaneously with forming the interconnects or the electrode of the capacitive element in order to prevent increasing the number of the process steps. The resistor is often formed by utilizing the film that is deposited to form the gate electrode of the transistor, the electrode of the capacitive element, an interconnect or the like, in order to prevent increasing the number of the process steps. For example, a structure of a resistor utilizing an upper electrode of a capacitor having MIM structure is disclosed in Japanese Patent Laid-Open No. 2001-267,320.
The structure disclosed in Japanese Patent Laid-Open No. 2001-267,320 are formed by a process, in which a metal film for a lower electrode of a capacitor is deposited and patterned to form a lower electrode, and then an insulator that would be a capacitive film and a metal film for an upper electrode are deposited, and the insulator and the metal film are simultaneously patterned. A resistor is formed by utilizing only the upper electrode and the insulator of the MIM structure capacitor. Further, a grounding interconnects are provided in the lower part of the resistor, sandwiching the insulating film, and thus a capacitive interference thereof with the grounding interconnects may possibly be caused. Therefore, such configuration may induce a considerable level of the parasitic capacitance between the resistor and the underlying interconnect, particularly in a higher frequency range, causing the resistor being impossible to be used in the higher frequency range.